SN74LVC2G38 - Dual 2-Input NAND Gate with Open Drain Output

The SN74LVC2G38 is designed for 1.65-V to 5.5-V V_CC operation.

This device is a dual two-input NAND buffer gate with open-drain outputs. It performs the Boolean function Y = A • B or Y = A + B in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Products containing the "SN74LVC2G38" keyword are: SN74LVC2G38DCTR , SN74LVC2G38DCTR , SN74LVC2G38DCUR , SN74LVC2G38DCUR , SN74LVC2G38DCURE4 , SN74LVC2G38DCURG4 , SN74LVC2G38DCURG4 , SN74LVC2G38DCUT , SN74LVC2G38DCUT , SN74LVC2G38DCUTE4 , SN74LVC2G38DCUTE4 , SN74LVC2G38DCUTG4 , SN74LVC2G38DCUTG4 , SN74LVC2G38YZPR , SN74LVC2G38YZPR

• Available in the Texas Instruments NanoFree Package
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4 ns at 3.3 V
• Low Power Consumption, 10-μA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
  >2 V at V_CC = 3.3 V, T_A = 25°C
• I_off Supports Live insertion, Partial-Power-Down Mode Operation and Back Drive Protection
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)