The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputsdesigned for 1.65-V to 5.5-V VCC operation and performs the Boolean functionY = A × B or Y = A + B inpositive logic.
Because of Schmitt action, this device has different input threshold levels forpositive-going (VT+) and negative-going (VT–)signals.
This device can be triggered from the slowest of input ramps and still give cleanjitter-free output signals.
This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
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Products containing the "SN74LVC1G132" keyword are: SN74LVC1G132DBVR , SN74LVC1G132DBVR , SN74LVC1G132DBVRG4 , SN74LVC1G132DBVT , SN74LVC1G132DBVT , SN74LVC1G132DBVTG4 , SN74LVC1G132DBVTG4 , SN74LVC1G132DCKR , SN74LVC1G132DCKR , SN74LVC1G132DCKRG4 , SN74LVC1G132DCKRG4/D5R , SN74LVC1G132DCKT , SN74LVC1G132DCKT , SN74LVC1G132YEPR , SN74LVC1G132YZPRAll trademarks are the property of their respective owners.
| Status | ACTIVE |
| SubFamily | NAND gate |
| Technology Family | LVC |
| VCC | 5.5 |
| Channels | 1 |
| Inputs per channel | 2 |
| ICC @ nom voltage | 0.01 |
| IOL | 32 |
| IOH | -32 |
| Input type | Schmitt-Trigger |
| Output type | Push-Pull |
| Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
| Data rate | 100 |
| Rating | Catalog |
| Operating temperature range | -40 to 125 |
| Package Group | SC70|5 |
| Package size: mm2:W x L (PKG) | [pf]5SC70[/pf]: 4 mm2: 2.1 x 2 (SC70|5) |
| Approx. price | 0.07 | 1ku |