This single 2-input positive-AND gate is designed for 0.8-V to 3.6-V VCC operation and performs the Boolean function Y = A B or Y = A\ + B\ in positive logic.
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| SubFamily | AND gate |
| Technology Family | AUP |
| VCC | 3.6 |
| Channels | 1 |
| Inputs per channel | 2 |
| ICC @ nom voltage | 0.0009 |
| IOL | 4 |
| IOH | -4 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Very High Speed (tpd 5-10ns) |
| Data rate | 100 |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | DSBGA|5 |
| Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
| Approx. price | 0.07 | 1ku |