This octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH244 is organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
Products containing the "SN74ALVCH244" keyword are: SN74ALVCH244DGVR , SN74ALVCH244DGVR , SN74ALVCH244DW , SN74ALVCH244DW , SN74ALVCH244DWR , SN74ALVCH244DWR , SN74ALVCH244NSR , SN74ALVCH244NSRE4 , SN74ALVCH244NSRG4 , SN74ALVCH244PW , SN74ALVCH244PWE4 , SN74ALVCH244PWR , SN74ALVCH244PWR , SN74ALVCH244PWR TSSOP20 , SN74ALVCH244PWRE4 , SN74ALVCH244PWRE4 , SN74ALVCH244PWRG4| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | ALVC |
| VCC | 3.6 |
| Bits | 8 |
| Voltage | 1.8^2.5^2.7^3.3 |
| F @ nom voltage | 100 |
| tpd @ Nom Voltage | 3.1^2.8 |
| ICC @ nom voltage | 0.01 |
| IOL | 24 |
| IOH | -24 |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | SOIC|20 |
| Package size: mm2:W x L (PKG) | [pf]20SOIC[/pf]: 132 mm2: 10.3 x 12.8 (SOIC|20) |
| Approx. price | 0.20 | 1ku |