This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16827 is characterized for operation from -40°C to 85°C.
Products containing the "SN74ALVCH16827" keyword are: SN74ALVCH16827DGGR , SN74ALVCH16827DGGR , SN74ALVCH16827DGGRG4 , SN74ALVCH16827DL , SN74ALVCH16827DL , SN74ALVCH16827DLG4 , SN74ALVCH16827DLR , SN74ALVCH16827DLRWidebus, EPIC are trademarks of Texas Instruments.
Status | ACTIVE |
SubFamily | Non-Inverting buffer/driver |
Technology Family | ALVC |
VCC | 3.6 |
Bits | 20 |
Voltage | 1.8^2.5^2.7^3.3 |
F @ nom voltage | 100 |
tpd @ Nom Voltage | 4.1^3.9^3.4 |
ICC @ nom voltage | 0.04 |
IOL | 24 |
IOH | -24 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SSOP|56 |
Package size: mm2:W x L (PKG) | [pf]56SSOP[/pf]: 191 mm2: 10.35 x 18.42 (SSOP|56) |
Approx. price | 1.00 | 1ku |