This 18-bit buffer and line driver is designed for 1.65-V to 3.6-V VCC operation.
This SN74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data.
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all nine affected outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.
The SN74ALVCH16825 is characterized for operation from &$150;40°C to 85°C.
Products containing the "SN74ALVCH16825" keyword are: SN74ALVCH16825 , SN74ALVCH16825DGGR , SN74ALVCH16825DGGR , SN74ALVCH16825DL , SN74ALVCH16825DL , SN74ALVCH16825DLRWidebus, EPIC are trademarks of Texas Instruments.
| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | ALVC |
| VCC | 3.6 |
| Bits | 18 |
| Voltage | 1.8^2.5^2.7^3.3 |
| F @ nom voltage | 100 |
| tpd @ Nom Voltage | 4.9^3.9^3.4 |
| ICC @ nom voltage | 0.04 |
| IOL | 24 |
| IOH | -24 |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | SSOP|56 |
| Package size: mm2:W x L (PKG) | [pf]56SSOP[/pf]: 191 mm2: 10.35 x 18.42 (SSOP|56) |
| Approx. price | 0.82 | 1ku |