SN74ALVCH162827 - 20-Bit Buffer/Driver With 3-State Outputs

Updated : 2020-01-09 14:35:13
Description

This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH162827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Products containing the "SN74ALVCH162827" keyword are: SN74ALVCH162827DGG , SN74ALVCH162827DGGR , SN74ALVCH162827DGGRG4 , SN74ALVCH162827DL , SN74ALVCH162827DL , SN74ALVCH162827DLR , SN74ALVCH162827DLR , SN74ALVCH162827GR , SN74ALVCH162827GR , SN74ALVCH162827GRE4 , SN74ALVCH162827GRG4 , SN74ALVCH162827VR , SN74ALVCH162827VR , SN74ALVCH162827VRG4
Features

  • Member of the Texas Instruments Widebus™ Family
  • Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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