SN74ALVC125 - Quadruple Bus Buffer Gates With 3-State Outputs

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Products containing the "SN74ALVC125" keyword are: SN74ALVC125D , SN74ALVC125D , SN74ALVC125DE4 , SN74ALVC125DE4 , SN74ALVC125DG4 , SN74ALVC125DG4 , SN74ALVC125DGVR , SN74ALVC125DGVR , SN74ALVC125DGVR TVSOP14 , SN74ALVC125DGVRG4 , SN74ALVC125DR , SN74ALVC125DR , SN74ALVC125DRE4 , SN74ALVC125DRE4 , SN74ALVC125DRG4 , SN74ALVC125DRG4 , SN74ALVC125NS , SN74ALVC125NSE4 , SN74ALVC125NSR , SN74ALVC125NSR

• Operates From 1.65 V to 3.6 V
• Max t_pd of 2.8 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)