SN74ALVC126 - Quadruple Bus Buffer Gate With 3-State Outputs

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Products containing the "SN74ALVC126" keyword are: SN74ALVC126D , SN74ALVC126D , SN74ALVC126DGVR , SN74ALVC126DGVR , SN74ALVC126DGVRE4 , SN74ALVC126DGVRG4 , SN74ALVC126DR , SN74ALVC126DR , SN74ALVC126DRG4 , SN74ALVC126NSE4 , SN74ALVC126NSR , SN74ALVC126NSR , SN74ALVC126NSRG4 , SN74ALVC126PWR , SN74ALVC126PWR , SN74ALVC126PWRE4 , SN74ALVC126PWRE4 , SN74ALVC126PWRG4

• Operates From 1.65 V to 3.6 V
• Max t_pd of 3.1 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)