SN74ALVCH162244 - 16-Bit Buffer/Driver With 3-State Outputs

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH162244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH162244 is characterized for operation from –40°C to 85°C.

Products containing the "SN74ALVCH162244" keyword are: SN74ALVCH162244DGG , SN74ALVCH162244DGGR , SN74ALVCH162244DGGRG4 , SN74ALVCH162244DL , SN74ALVCH162244DL , SN74ALVCH162244DLR , SN74ALVCH162244DLR , SN74ALVCH162244GR , SN74ALVCH162244GR , SN74ALVCH162244GRE4 (P/B , SN74ALVCH162244GRG , SN74ALVCH162244GRG4

• Member of the Texas Instruments Widebus™ Family
• EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
• Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

NOTE: For tape-and-reel order entry, the DGGR package is abbreviated to GR.

Widebus, EPIC are trademarks of Texas Instruments.