This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G32 device performs the Boolean function Y = A + B or Y = A\ + B\ in positive logic.
The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.
The SN74LVC1G32 device is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 × 0.8 mm.
Products containing the "SN74LVC1G32" keyword are: SN74LVC1G3208DBVR , SN74LVC1G3208DBVR , SN74LVC1G3208DBVRG4 , SN74LVC1G3208DBVT , SN74LVC1G3208DBVT , SN74LVC1G3208DBVT(HBM2K, , SN74LVC1G3208DCKR , SN74LVC1G3208DCKR , SN74LVC1G3208DCKRG4 , SN74LVC1G3208DCKT , SN74LVC1G3208DCKT , SN74LVC1G3208YZPR , SN74LVC1G3208YZPR , SN74LVC1G3208YZTR , SN74LVC1G3208YZTR , SN74LVC1G32DBVR , SN74LVC1G32DBVR , SN74LVC1G32DBVR3 , SN74LVC1G32DBVRE4 , SN74LVC1G32DBVRE4| Status | ACTIVE |
| SubFamily | OR gate |
| Technology Family | LVC |
| VCC | 5.5 |
| Channels | 1 |
| Inputs per channel | 2 |
| ICC @ nom voltage | 0.01 |
| IOL | 32 |
| IOH | -32 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
| Data rate | 100 |
| Rating | Catalog |
| Operating temperature range | -40 to 125 |
| Package Group | DSBGA|5 |
| Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
| Approx. price | 0.07 | 1ku |