This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G08 device performs the Boolean function A × B or Y = A\ + B\ in positive logic.
NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For all available packages, see the orderable addendum at the end of the data sheet. Products containing the "SN74LVC2G08" keyword are: SN74LVC2G08DCTR , SN74LVC2G08DCTR , SN74LVC2G08DCTR-P , SN74LVC2G08DCTRE4 , SN74LVC2G08DCTRE4 , SN74LVC2G08DCTRG4 , SN74LVC2G08DCTRG4 , SN74LVC2G08DCU6 , SN74LVC2G08DCU6G4 , SN74LVC2G08DCUR , SN74LVC2G08DCUR , SN74LVC2G08DCUR , STU09N , SN74LVC2G08DCURE4 , SN74LVC2G08DCURE4 , SN74LVC2G08DCURG4 , SN74LVC2G08DCURG4 , SN74LVC2G08DCURG4/C08R , SN74LVC2G08DCUT , SN74LVC2G08DCUT , SN74LVC2G08DCUTE4Status | ACTIVE |
SubFamily | AND gate |
Technology Family | LVC |
VCC | 5.5 |
Channels | 2 |
Inputs per channel | 2 |
ICC @ nom voltage | 0.01 |
IOL | 32 |
IOH | -32 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
Data rate | 100 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | DSBGA|8 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
Approx. price | 0.14 | 1ku |