This single 2-input positive-AND gate is operational at 0.8-V to 2.7-VVCC, but is designed specifically for 1.65-V to 1.95-VVCC operation.
The SN74AUC1G08 device performs the Boolean function in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using thedie as the package.
This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74AUC1G08" keyword are: SN74AUC1G08DBVR , SN74AUC1G08DBVR , SN74AUC1G08DBVRG4 , SN74AUC1G08DBVRG4 , SN74AUC1G08DCK3 , SN74AUC1G08DCKR , SN74AUC1G08DCKR , SN74AUC1G08DCKR//PCN-SN7 , SN74AUC1G08DCKRG4 , SN74AUC1G08DCKRG4 , SN74AUC1G08DCKRTI , SN74AUC1G08DRLR , SN74AUC1G08DRLR , SN74AUC1G08DRLR/UER , SN74AUC1G08DRLRG4 , SN74AUC1G08DRLRG4 , SN74AUC1G08YEAR , SN74AUC1G08YEPR , SN74AUC1G08YZAR , SN74AUC1G08YZPRAll trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | AND gate |
Technology Family | AUC |
VCC | 2.7 |
Channels | 1 |
Inputs per channel | 2 |
ICC @ nom voltage | 0.01 |
IOL | 9 |
IOH | -9 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
Data rate | 250 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | DSBGA|5 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
Approx. price | 0.07 | 1ku |