SN74LV20A - Dual 4-Input Positive-NAND Gate

These dual 4-input positive-NAND gates are designed for 2-V to 5.5-V V_CC operation.

The 'LV20A devices perform the Boolean function Y = (A • B • C • D)\ or Y = A\ + B\ + C\ + D\ in positive logic.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

• 2-V to 5.5-V V_CC Operation
• Max t_pd of 6 ns at 5 V
• Typical V_OLP (Output Ground Bounce)
      <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
     >>2.3 V at V_CC = 3.3 V, T_A = 25°C
• I_off Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)