These positive-edge-triggered D-type flip-flops have a direct clear (CLR)\ input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
Products containing the "SN74HC174" keyword are: SN74HC174APWR , SN74HC174D , SN74HC174D , SN74HC174DB , SN74HC174DB TSSOP-16 , SN74HC174DBR , SN74HC174DBR , SN74HC174DBRG4 , SN74HC174DE4 , SN74HC174DE4 , SN74HC174DG4 , SN74HC174DR , SN74HC174DR , SN74HC174DR (PB) , SN74HC174DRE4 , SN74HC174DRG4 , SN74HC174DRG4 , SN74HC174DT , SN74HC174DT , SN74HC174NStatus | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | HC |
VCC | 6 |
Bits | 6 |
Voltage | 3.3^5 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.08 |
tpd @ Nom Voltage | 34 |
3-state output | No |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | PDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.12 | 1ku |