The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A–H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SNx4HC165 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (QH) output.
Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.
Products containing the "SN74HC165" keyword are: SN74HC165ANS , SN74HC165ANSE4 , SN74HC165ANSR , SN74HC165ANSR , SN74HC165ANSRG4 , SN74HC165APWR , SN74HC165APWR , SN74HC165D , SN74HC165D , SN74HC165DBR , SN74HC165DBR , SN74HC165DBRG4 , SN74HC165DE4 , SN74HC165DE4 , SN74HC165DG4 , SN74HC165DR , SN74HC165DR , SN74HC165DR , HUN2232XLT , SN74HC165DR 74HC165N 74H , SN74HC165DR SOP3.9Status | ACTIVE |
SubFamily | Shift register |
Technology Family | HC |
VCC | 6 |
Bits | 8 |
Voltage | 6 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.08 |
tpd @ Nom Voltage | 38 |
3-state output | No |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | PDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.11 | 1ku |