These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set-up time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.
Products containing the "SN74HC164" keyword are: SN74HC164 , SN74HC164ANSR , SN74HC164ANSR , SN74HC164D , SN74HC164D , SN74HC164DE4 , SN74HC164DE4 , SN74HC164DG4 , SN74HC164DR , SN74HC164DR , SN74HC164DRG3 , SN74HC164DRG3 , SN74HC164DRG4 , SN74HC164DRG4 , SN74HC164DRSN74HC165DR , SN74HC164DT , SN74HC164DT , SN74HC164N , SN74HC164N , SN74HC164NE4Status | ACTIVE |
SubFamily | Shift register |
Technology Family | HC |
VCC | 6 |
Bits | 8 |
Voltage | 6 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.08 |
tpd @ Nom Voltage | 38 |
3-state output | No |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | PDIP|14 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.08 | 1ku |