These octal edge-triggered D-type flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input.
A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
Products containing the "SN74HC574" keyword are: SN74HC574AN , SN74HC574AN , SN74HC574ANSR , SN74HC574ANSR , SN74HC574APWR , SN74HC574DBR , SN74HC574DBRE4 , SN74HC574DBRE4 , SN74HC574DBRG4 , SN74HC574DBRG4 , SN74HC574DNR , SN74HC574DW , SN74HC574DW , SN74HC574DWE4 , SN74HC574DWG4 , SN74HC574DWG4 , SN74HC574DWR , SN74HC574DWR , SN74HC574DWR(7.2MM+NEW+) , SN74HC574DWRG4Status | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | HC |
VCC | 6 |
Bits | 8 |
Voltage | 3.3^5 |
F @ nom voltage | 28 |
ICC @ nom voltage | 0.08 |
tpd @ Nom Voltage | 38 |
3-state output | Yes |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | PDIP|20 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.12 | 1ku |