CD4068B - CMOS 8-Input NAND/AND Gate

Updated : 2020-01-09 14:38:53
Description

CD4068B NAND/AND gate provides the system designer with direct implementation of the positive-logic 8-input NAND and AND functions and supplements the existing family of CMOS gates.

The CD4068B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

Products containing the "CD4068B" keyword are: CD4068BD , CD4068BD/3 , CD4068BE , CD4068BE , CD4068BE-NG , CD4068BEE4 , CD4068BEE4 , CD4068BEG4 , CD4068BEX , CD4068BF , CD4068BF/3 , CD4068BF3A , CD4068BFX , CD4068BM , CD4068BM , CD4068BM(CD4068BM) , CD4068BM96 , CD4068BM96 , CD4068BM96/SOP , CD4068BM96E4
Features

  • Medium Speed Operation:
       tPHL, tPLH=75 ns (typ.) at VDD = 10 V
  • Buffered inputs and outputs
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized symmetrical output characteristics
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (over full package-temperature range) =
         1 V at VDD = 5 V
         2 V at VDD = 10 V
      2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

Parametrics
StatusACTIVE
SubFamilyCombination gate
Technology FamilyCD4000
VCC18
Channels1
Inputs per channel8
ICC @ nom voltage0.15
IOL6.8
IOH-6.8
Input typeStandard CMOS
Output typePush-Pull
FeaturesStandard Speed (tpd > 50ns)
Data rate8
RatingCatalog
Operating temperature range-55 to 125
Package GroupPDIP|14
Package size: mm2:W x L (PKG)See datasheet (PDIP)
Approx. price0.11 | 1ku