LMK01801 - LMK01801 Dual Clock Distribution

The LMK01801 is a very low noise solution for clocking systems that require distribution and frequency division of precision clocks.

The LMK01801 features extremely low residual noise, frequency division, digital and analog delay adjustments, and fourteen (14) programmable differential outputs: LVPECL, LVDS and LVCMOS (2 outputs per differential output).

The LMK01801 features two independent inputs that can be driven differentially (LVDS, LVPECL) or in single-ended mode (LVCMOS, RF Sinewave). The first input drives output Bank A consisting of eight (8) outputs. The second input drives output Bank B consisting of six (6) outputs.

Products containing the "LMK01801" keyword are: LMK01801BEVAL/NOPB , LMK01801BEVAL/NOPB , LMK01801BISQ , LMK01801BISQ/NOPB , LMK01801BISQ/NOPB , LMK01801BISQE , LMK01801BISQE/NOP , LMK01801BISQE/NOPB , LMK01801BISQE/NOPB , LMK01801BISQENOP , LMK01801BISQENOPB , LMK01801BISQNOPB , LMK01801BISQX/NOPB , LMK01801BISQX/NOPB

• Pin Control Mode or MICROWIRE (SPI)
• Input and Output Frequency Range 1 kHz to 3.1 GHz
• Separate Input for Clock Output Banks A & B.
• 14 Differential Clock Outputs in Two Banks (A & B)
  • Output Bank A 8 Differential, Programmable Outputs (Up to 8 as LVCMOS) Divider Values of 1 to 8, Even and Odd.
  • Output Bank B 6 Differential Outputs (or up to 12 as LVCMOS) Divides Values of 1 to 1045 or 1 to 8, Even and OddAnalog and Digital Delays
• 50% Duty Cycle on All Outputs for All Divides
• Separate Synchronization of Bank A and B.
• RMS Additive Jitter 50 fs at 800 MHz
  • 50 fs RMS Additive Jitter (12 kHz to 20 MHz)
• Industrial Temperature Range: -40 to 85 °C
• 3.15 V to 3.45 V Operation

All trademarks are the property of their respective owners.