ADC12J4000 - 12-Bit, 4.0-GSPS, RF Sampling Analog-to-Digital Converter (ADC)

The ADC12J4000 deviceis a wideband sampling anddigital tuning device. Texas Instruments’ giga-sampleanalog-to-digital converter (ADC) technology enables a large block of frequency spectrum to besampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering anddown-conversion. The selected frequency block is made available on a JESD204B serial interface.Data is output as baseband 15-bit complex information for ease of downstream processing. Based onthe digital down-converter (DDC) decimation and link output rate settings, this data is output on 1to 5 lanes of the serial interface.

A DDC bypass mode allows the full rate 12-bit raw ADC data toalso be output. This mode of operation requires 8 lanes of serial output.

The ADC12J4000 deviceis available in a 68-pinVQFN package. The device operates over the Industrial (–40°C ≤ T_A ≤ 85°C)ambient temperature range.

• Excellent Noise and Linearity up to and beyond F_IN = 3 GHz
• Configurable DDC
• Decimation Factors from 4 to 32 (Complex Baseband Out)
• Usable Output Bandwidth of 800 MHz at
  4x Decimation and 4000 MSPS
• Usable Output Bandwidth of 100 MHz at
  32x Decimation and 4000 MSPS
• Bypass Mode for Full Nyquist Output Bandwidth
• Low Pin-Count JESD204B Subclass 1 Interface
• Automatically Optimized Output Lane Count
• Embedded Low Latency Signal Range Indication
• Low Power Consumption
• Key Specifications:
  • Max Sampling Rate: 4000 MSPS
  • Min Sampling Rate: 1000 MSPS
  • DDC Output Word Size: 15-Bit Complex (30 bits total)
  • Bypass Output Word Size: 12-Bit Offset Binary
  • Noise Floor: −149 dBFS/Hz or −150.8 dBm/Hz
  • IMD3: −64 dBc (F_IN = 2140 MHz ± 30 MHz at −13 dBFS)
  • FPBW (–3 dB): 3.2 GHz
  • Peak NPR: 46 dB
  • Supply Voltages: 1.9 V and 1.2 V
  • Power Consumption
    • Bypass (4000 MSPS): 2 W
    • Decimate by 10 (4000 MSPS): 2 W
    • Power Down Mode: <50 mW

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