SN74LV4046A - High-Speed CMOS Logic Phase-Locked Loop with VCO

Updated : 2020-01-09 14:41:37
Description

The SN74LV4046A is a high-speed silicon-gate CMOS device that is pin compatible with the CD4046B and the CD74HC4046. The device is specified in compliance with JEDEC Std 7.

The SN74LV4046A is a phase-locked loop (PLL) circuit that contains a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2, and PC3). A signal input and a comparator input are common to each comparator.

The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the SN74LV4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear operational amplifier techniques. Various applications include telecommunications, digital phase-locked loop and signal generators.

Products containing the "SN74LV4046A" keyword are: SN74LV4046AD , SN74LV4046AD , SN74LV4046ADG4 , SN74LV4046ADG4 , SN74LV4046ADGVR , SN74LV4046ADGVR , SN74LV4046ADR , SN74LV4046ADR , SN74LV4046ADRG4 , SN74LV4046ADRG4 , SN74LV4046AN , SN74LV4046AN , SN74LV4046ANE4 , SN74LV4046ANE4 , SN74LV4046ANS , SN74LV4046ANS , SN74LV4046ANSR , SN74LV4046ANSR , SN74LV4046ANSRG4 , SN74LV4046APW
Features

  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • Choice of Three Phase Comparators
    • Exclusive OR
    • Edge-Triggered J-K Flip-Flop
    • Edge-Triggered RS Flip-Flop
  • Excellent VCO Frequency Linearity
  • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
  • Optimized Power-Supply Voltage Range From 3 V to 5.5 V
  • Wide Operating Temperature Range From –40°C to +125°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17