These positive-edge-triggered D-type flip-flops have a direct clear (CLR)\ input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
Products containing the "SN74AHCT174" keyword are: SN74AHCT174D , SN74AHCT174DB , SN74AHCT174DBR , SN74AHCT174DBR , SN74AHCT174DBRG4 , SN74AHCT174DGVR , SN74AHCT174DGVRE4 , SN74AHCT174DGVRG4 , SN74AHCT174DR , SN74AHCT174DR , SN74AHCT174N , SN74AHCT174N , SN74AHCT174NSR , SN74AHCT174NSR , SN74AHCT174PWR , SN74AHCT174PWRG4Status | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | AHCT |
VCC | 5.5 |
Bits | 6 |
Voltage | 5 |
F @ nom voltage | 70 |
ICC @ nom voltage | 0.04 |
tpd @ Nom Voltage | 10 |
3-state output | No |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | PDIP|16 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.12 | 1ku |