These bus buffers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The LVTH125 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE)\ input is high.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
Products containing the "SN74LVTH125" keyword are: SN74LVTH125D , SN74LVTH125D , SN74LVTH125DB , SN74LVTH125DBR , SN74LVTH125DBR , SN74LVTH125DBR LXH125 , SN74LVTH125DBR SSOP14 , SN74LVTH125DBRE4 , SN74LVTH125DBRE4 , SN74LVTH125DBRG4 , SN74LVTH125DE4 , SN74LVTH125DE4 , SN74LVTH125DG4 , SN74LVTH125DG4 , SN74LVTH125DGVR , SN74LVTH125DGVR , SN74LVTH125DGVRE4 , SN74LVTH125DGVRE4 , SN74LVTH125DGVRG4 , SN74LVTH125DRStatus | ACTIVE |
SubFamily | Non-Inverting buffer/driver |
Technology Family | LVT |
VCC | 3.6 |
Bits | 4 |
Voltage | 3.3 |
F @ nom voltage | 160 |
tpd @ Nom Voltage | 3.5 |
ICC @ nom voltage | 0.007 |
IOL | 64 |
IOH | -32 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SOIC|14 |
Package size: mm2:W x L (PKG) | [pf]14SO[/pf]: 80 mm2: 7.8 x 10.2 (SO|14) |
Approx. price | 0.17 | 1ku |