This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVCH16240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting outputs and symmetrical active-low output-enable (OE)\ inputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74LVCH16240A" keyword are: SN74LVCH16240ADGGR , SN74LVCH16240ADL , SN74LVCH16240ADL , SN74LVCH16240ADLR , SN74LVCH16240ADLRWidebus is a trademark of Texas Instruments.
Status | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | LVC |
VCC | 3.6 |
Bits | 16 |
Voltage | 1.8^2.5^2.7^3.3 |
F @ nom voltage | 100 |
tpd @ Nom Voltage | 5^4.2 |
ICC @ nom voltage | 0.02 |
IOL | 24 |
IOH | -24 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SSOP|48 |
Package size: mm2:W x L (PKG) | [pf]48SSOP[/pf]: 164 mm2: 10.35 x 15.88 (SSOP|48) |
Approx. price | 0.45 | 1ku |