SN74LVCH16540A - 16-Bit Buffer/Driver With 3-State Outputs

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation, and provides a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all corresponding outputs are in the high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Products containing the "SN74LVCH16540A" keyword are: SN74LVCH16540ADGGR , SN74LVCH16540ADGGR , SN74LVCH16540ADL , SN74LVCH16540ADL , SN74LVCH16540ADLR

• Member of the Texas Instruments Widebus™ Family
• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 3.7 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce)
     <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
     >2 V at V_CC = 3.3 V, T_A = 25°C
• I_off Supports Partial-Power-Down Mode Operation
• Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 1000-V Charged-Device Model (C101)

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