SN74LVCH244A - Octal Buffer/Driver With 3-State Outputs

The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V V_CC operation.

These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Products containing the "SN74LVCH244A" keyword are: SN74LVCH244ADB , SN74LVCH244ADBQ , SN74LVCH244ADBQR , SN74LVCH244ADBQR , SN74LVCH244ADBQRE4 , SN74LVCH244ADBQRE4 , SN74LVCH244ADBQRG4 , SN74LVCH244ADBR , SN74LVCH244ADBR LCH244A , SN74LVCH244ADBRG4 , SN74LVCH244ADGVR , SN74LVCH244ADGVRG4 , SN74LVCH244ADW , SN74LVCH244ADW , SN74LVCH244ADWG , SN74LVCH244ADWG4 , SN74LVCH244ADWG4 , SN74LVCH244ADWR , SN74LVCH244ADWR , SN74LVCH244ADWRG4

• Operate From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 5.9 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at V_CC = 3.3 V, T_A = 25°C
• Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
• I_off Supports Partial-Power-Down Mode Operation
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)