These hex buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The HC365 devices contain six independent buffers/drivers with dual-gated output-enable (OE1\ and OE2\) inputs. When OE1\ and OE2\ are both low, the deviceS pass noninverted data from the A inputs to the Y outputs. If either (or both) output-enable terminal(s) is high, the outputs are in the high-impedance state.
Products containing the "SN74HC365" keyword are: SN74HC365D , SN74HC365D , SN74HC365DE4 , SN74HC365DE4 , SN74HC365DG4 , SN74HC365DG4 , SN74HC365DR , SN74HC365DR , SN74HC365DRE4 , SN74HC365DRE4 , SN74HC365DRG4 , SN74HC365DRG4 , SN74HC365DT , SN74HC365N , SN74HC365N , SN74HC365NE4 , SN74HC365NE4 , SN74HC365NG4 , SN74HC365NS , SN74HC365NS-R2| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | HC |
| VCC | 6 |
| Bits | 6 |
| Voltage | 6 |
| F @ nom voltage | 28 |
| tpd @ Nom Voltage | 20 |
| ICC @ nom voltage | 0.08 |
| IOL | 6 |
| IOH | -6 |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | PDIP|16 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.17 | 1ku |