These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When (OE)\ is low, the device passes inverted data from the A inputs to the Y outputs. When (OE)\ is high, the outputs are in the high-impedance state.
Products containing the "SN74HCT240" keyword are: SN74HCT240ANSR , SN74HCT240APWR , SN74HCT240APWRG4 , SN74HCT240DW , SN74HCT240DW , SN74HCT240DWG4 , SN74HCT240DWG4 , SN74HCT240DWR , SN74HCT240DWR , SN74HCT240DWRE4 , SN74HCT240DWRE4 , SN74HCT240N , SN74HCT240N , SN74HCT240NE4 , SN74HCT240NS , SN74HCT240NSL , SN74HCT240NSR , SN74HCT240NSR , SN74HCT240PW , SN74HCT240PWStatus | ACTIVE |
SubFamily | Inverting buffer/driver |
Technology Family | HCT |
VCC | 5.5 |
Bits | 8 |
Voltage | 5 |
F @ nom voltage | 25 |
tpd @ Nom Voltage | 29 |
ICC @ nom voltage | 0.08 |
IOL | 6 |
IOH | -6 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | PDIP|20 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.12 | 1ku |