These quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pullup resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Products containing the "SN74HC126" keyword are: SN74HC126AN , SN74HC126ANS , SN74HC126ANSR , SN74HC126ANSRG4 , SN74HC126APWR , SN74HC126D , SN74HC126DBLE , SN74HC126DBR , SN74HC126DBR , SN74HC126DBRG4 , SN74HC126DG4 , SN74HC126DG4 , SN74HC126DR , SN74HC126DR , SN74HC126DRE4 , SN74HC126DRE4 , SN74HC126DRG4 , SN74HC126DRG4 , SN74HC126DRTI , SN74HC126DTStatus | ACTIVE |
SubFamily | Non-Inverting buffer/driver |
Technology Family | HC |
VCC | 6 |
Bits | 4 |
Voltage | 6 |
F @ nom voltage | 28 |
tpd @ Nom Voltage | 26 |
ICC @ nom voltage | 0.08 |
IOL | 6 |
IOH | -6 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | PDIP|14 |
Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
Approx. price | 0.09 | 1ku |