These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The HC241 devices are organized as two 4-bit buffers/drivers with separate output-enable (1OE\ and 2OE) inputs. When 1OE\ is low or 2OE is high, the device passes noninverted data from the A inputs to the Y outputs. When 1OE\ is high or 2OE is low, the outputs for the respective buffers/drivers are in the high-impedance state.
Products containing the "SN74HC241" keyword are: SN74HC241DW , SN74HC241DW , SN74HC241DWE4 , SN74HC241DWE4 , SN74HC241DWG4 , SN74HC241DWR , SN74HC241DWR , SN74HC241DWR SOP7.2 , SN74HC241DWRG4 , SN74HC241DWRG4 , SN74HC241N , SN74HC241N , SN74HC241NE4 , SN74HC241NS , SN74HC241NSR , SN74HC241NSR , SN74HC241NSR (PB FREE) , SN74HC241NSR SOP5.2 , SN74HC241PW , SN74HC241PW| Status | ACTIVE |
| SubFamily | Non-Inverting buffer/driver |
| Technology Family | HC |
| VCC | 6 |
| Bits | 8 |
| Voltage | 6 |
| F @ nom voltage | 28 |
| tpd @ Nom Voltage | 25 |
| ICC @ nom voltage | 0.08 |
| IOL | 6 |
| IOH | -6 |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | PDIP|20 |
| Package size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Approx. price | 0.12 | 1ku |