SN74AUC1G240 - Single Buffer/Driver With 3-State Output

This bus buffer gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC1G240 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Products containing the "SN74AUC1G240" keyword are: SN74AUC1G240DBVR , SN74AUC1G240DBVR , SN74AUC1G240DBVRG4 , SN74AUC1G240DCKR , SN74AUC1G240DCKR , SN74AUC1G240DCKRE4 , SN74AUC1G240YEPR , SN74AUC1G240YZPR , SN74AUC1G240YZPR

• Available in the Texas Instruments NanoFree™ Package
• Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• I_off Supports Partial-Power-Down Mode Operation
• Sub-1-V Operable
• Max t_pd of 2.5 ns at 1.8 V
• Low Power Consumption, 10-µA Max I_CC
• ±8-mA Output Drive at 1.8 V
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)

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