The SN74AUC1G126 bus buffer gate is operational at 0.8-V to 2.7-VVCC, but is designed specifically for 1.65-V to 1.95-VVCC operation.
The SN74AUC1G126 device is a single line driver with a tri-state output. The output isdisabled when the output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied toGND through a pulldown resistor; the minimum value of the resistor is determined by thecurrent-sourcing capability of the driver.
NanoFree™ package technology is a major breakthrough in device packaging concepts, usingthe die as the package.
This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs, whichprevents damaging current backflow through the device when it is powered down.
Products containing the "SN74AUC1G126" keyword are: SN74AUC1G126DBVR , SN74AUC1G126DBVR , SN74AUC1G126DCKR , SN74AUC1G126DCKRE4 , SN74AUC1G126DCKRG4 , SN74AUC1G126YEPR , SN74AUC1G126YZPR , SN74AUC1G126YZPR , SN74AUC1G126YZTR , SN74AUC1G126YZTRAll trademarks are the property of their respective owners.
Status | ACTIVE |
SubFamily | Non-Inverting buffer/driver |
Technology Family | AUC |
VCC | 2.7 |
Bits | 1 |
Voltage | 0.8^1.2^1.5^1.8^2.5 |
F @ nom voltage | 250 |
tpd @ Nom Voltage | 4.5^3.6^2.3^1.6^1.4 |
ICC @ nom voltage | 0.01 |
IOL | 9 |
IOH | -9 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | DSBGA|5 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
Approx. price | 0.07 | 1ku |