This device is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G3208 device is a single 3-input positive OR-AND gate. It performs the Boolean function Y = (A + B) ● C in positive logic.
By tying one input to GND or VCC, the SN74LVC1G3208 device offers two more functions. When C is tied to VCC, this device performs as a 2-input OR gate (Y = A + B). When A is tied to GND, the device works as a 2-input AND gate (Y = B ● C). This device also works as a 2-input AND gate when B is tied to GND (Y = A ● C).
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This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "SN74LVC1G3208" keyword are: SN74LVC1G3208DBVR , SN74LVC1G3208DBVR , SN74LVC1G3208DBVRG4 , SN74LVC1G3208DBVT , SN74LVC1G3208DBVT , SN74LVC1G3208DBVT(HBM2K, , SN74LVC1G3208DCKR , SN74LVC1G3208DCKR , SN74LVC1G3208DCKRG4 , SN74LVC1G3208DCKT , SN74LVC1G3208DCKT , SN74LVC1G3208YZPR , SN74LVC1G3208YZPR , SN74LVC1G3208YZTR , SN74LVC1G3208YZTRStatus | ACTIVE |
SubFamily | Configurable gate |
Technology Family | LVC |
VCC | 5.5 |
Channels | 1 |
Inputs per channel | 3 |
ICC @ nom voltage | 0.01 |
IOL | 32 |
IOH | -32 |
Input type | Standard CMOS |
Output type | Push-Pull |
Features | Partial Power Down (Ioff)^Over-Voltage Tolerant Inputs^Ultra High Speed (tpd <5ns) |
Data rate | 100 |
Rating | Catalog |
Operating temperature range | -40 to 125 |
Package Group | DSBGA|6 |
Package size: mm2:W x L (PKG) | See datasheet (DSBGA) |
Approx. price | 0.07 | 1ku |