SN74AXCH8T245 - 8-Bit Dual-Supply Bus Transceiver

The SN74AXCH8T245 device is an 8-bit non-inverting bus transceiver that resolves voltagelevel mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) anddevices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) and vice versa.

The device operates by using two independent power-supply rails(V_CCA and V_CCB) . Data pins A1 through A8 are designed to track V_CCA,which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed totrack V_CCB, which accepts any supply voltage from 0.65 V to 3.6 V.Additionally the SN74AXCH8T245 is compatible with a single-supply system.

The SN74AXCH8T245 device is designed for asynchronous communication between data buses.The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending onthe logic level of the direction-control inputs (DIR1 and DIR2). The output-enable(OE) input is used to disable the outputs so the buses are effectivelyisolated.

The SN74AXCH8T245 device is designed so the control pins (DIR andOE) are referenced to V_CCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use ofpull-up or pull-down resistors with the bus-hold circuitry is not recommended. If a supply ispresent for V_CCA or V_CCB, the bus-hold circuitryalways remains active on all A and B ports respectively, independent of the direction control oroutput enable.

This device is fully specified for partial-power-down applications usingI_off. The I_off circuitry disables the outputs whenthe device is powered down. This inhibits current backflow into the device which prevents damage tothe device.

The V_CC isolation feature ensures that if eitherV_CC input supply is below 100 mV, all level shifter outputs are disabled andplaced into a high-impedance state. To ensure the high-impedance state of the level shifter I/Osduring power up or power down, OE should be tied toV_CCA through a pull-up resistor; the minimum value of the resistor isdetermined by the current-sinking capability of the driver.

• Qualified Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range From 0.65 V to 3.6 V
• Operating Temperature From –40°C to +125°C
• Bus-hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
• Multiple Direction Control Pins to Allow Simultaneous Up and Down Translation
• Up to 380 Mbps support when translating from 1.8 V to 3.3 V
• V_CC Isolation Feature to Effectively Isolate Both Buses in a Power-Down Scenario
• Partial Power-Down Mode to Limit Backflow Current in a Power-Down Scenario
• Compatible With SN74AVCH8T245 and 74AVCH8T245 Level Shifters
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 8000-V Human-Body Model
  • 1000-V Charged-Device Model

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