LMK00334 - LMK00334 4-Output PCIe Gen1/Gen2/Gen3/Gen4 Clock Buffer/Level Translator

The LMK00334 device is a 4-output HCSL fanout buffer intended for high-frequency,low-jitter clock, data distribution, and level translation. The input clock can be selected fromtwo universal inputs or one crystal input. The selected input clock is distributed to two banks of2 HCSL outputs and one LVCMOS output. The LVCMOS output has a synchronous enable input forrunt-pulse-free operation when enabled or disabled. The LMK00334 operates from a 3.3-V core supplyand 3 independent 3.3-V or 2.5-V output supplies.

The LMK00334 provides high performance, versatility, and power efficiency, making itideal for replacing fixed-output buffer devices while increasing timing margin in thesystem.

• 3:1 Input Multiplexer
  • Two Universal Inputs Operate up to 400 MHz and Accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or Single-Ended Clocks
  • One Crystal Input Accepts a 10- to 40-MHz Crystal or Single-Ended Clock
• Two Banks With 2 Differential Outputs Each
  • HCSL, or Hi-Z (Selectable)
  • Additive RMS Phase Jitter for PCIe Gen3/Gen4 at 100 MHz:
    • 30 fs RMS (typical)
• High PSRR: –72 dBc at 156.25 MHz
• LVCMOS Output With Synchronous Enable Input
• Pin-Controlled Configuration
• V_CC Core Supply: 3.3 V ± 5%
• 3 Independent V_CCO Output Supplies: 3.3 V/2.5 V ± 5%
• Industrial Temperature Range: –40°C to +85°C
• 32-Lead WQFN (5 mm × 5 mm)

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