SN74LS652 - Octal bus transceivers and registers

These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Enable GAB and G\BA are provided to control the transceiver functions. SAB and SBA control pins are provided to select whether realtime or stored data is transferred. A low input level selects real-time data, and a high selects stored data. The following examples demonstrate the four fundamental bus-management functions that can be performed with the 'LS651, 'LS652, and 'LS653.

Data on the A or B data bus, or both, can be stored in the internal D flip-flop by low-to-high transitions at the appropriate clock pins (CAB or CBA) regardless of the select or enable control pins. When SAB or SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simultaneously enabling GAB and G\BA. In this configuration each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines will remain at its last state.

The SN54LS651 through SN54LS653 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS651 through SN74LS653 are characterized for operation from 0°C to 70°C.

• Bus Transceivers/Registers
• Independent Registers and Enables for A and B Buses
• Multiplexed Real-Time and Stored Data
• Choice of True and Inverting Data Paths
• Choice of 3-State or Open-Collector Outputs to A Bus
• Dependable Texas Instruments Quality and Reliability