The \x92FCT646T devices consist of a bus transceiver circuit with 3-state, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers as the appropriate clock pin goes to a high logic level. Output-enable (G\) and direction (DIR) inputs control the transceiver function. In the transceiver mode,data present at the high-impedance port can be stored in either the A or B register, or in both. Select controls (SAB, SBA) can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when G\ is low. In the isolation mode (G\ is high), A data can be stored in the B register and/or B data can be stored in the A register.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Products containing the "CY74FCT646T" keyword are: CY74FCT646TQC , CY74FCT646TQCT , CY74FCT646TQCT , CY74FCT646TQCTE4 , CY74FCT646TQCTG4 , CY74FCT646TQCTG4 , CY74FCT646TSOC , CY74FCT646TSOC , CY74FCT646TSOCE4 , CY74FCT646TSOCG4 , CY74FCT646TSOCT , CY74FCT646TSOCT , CY74FCT646TSOCTE4 , CY74FCT646TSOCTG4Status | ACTIVE |
SubFamily | Registered transceiver |
Technology Family | FCT |
VCC | 5.25 |
Bits | 8 |
Voltage | 5 |
F @ nom voltage | 70 |
tpd @ Nom Voltage | 6.3 |
IOL | 64 |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SOIC|24 |
Package size: mm2:W x L (PKG) | [pf]24SOIC[/pf]: 160 mm2: 10.3 x 15.5 (SOIC|24) |
Approx. price | 0.26 | 1ku |
Schmitt Trigger | No |