AFE7422 - Dual-channel RF-sampling AFE with 14-bit 9GSPS DAC and 3GSPS ADC with bypass mode

The AFE7422 is a dual-channel, wideband, RF-sampling analog front end (AFE) based on 14-bit,9-GSPS DACs and 14-bit, 3-GSPS ADCs. With operation at an RF of up to 5.2 GHz, this device enablesdirect RF sampling into the C-band frequency range without the need for additional frequencyconversions stages. This dramatic improvement in density and flexibility enableshigh-channel-count, multimission systems.

The DAC signal paths support interpolation and digital up conversion options that deliverup to 1200 MHz of signal bandwidth. Thedifferential output path includes a digital step attenuator (DSA), which enables tuning of outputpower.

Each ADC input path includes a DSA and RF/Digital power detectors. Flexible decimation options provide optimization of data bandwidth and adecimation bypass mode is also available for widest signal bandwidth.

An 8-lane (8 TX + 8 RX) subclass-1 compliant JESD204B interface operates at up to 15Gbps. A bypassable on-chip PLL simplifies clock operation with an optional clock output.

• Two, 14-Bit, 9-GSPS DACs
  • Up to 1200-MHz Signal Bandwidth
  • DSA per Channel Tunes Output Power
• Two, 14-Bit, 3-GSPS ADCs
  • NSD: –152 dBFS/Hz
  • AC Performance at f_IN = 2.6 GHz, –3 dBFS
    • SNR: 56 dBFS
    • SFDR: 70 dBc HD2 and HD3
    • SFDR: 75 dBc Worst Spur
  • Aperture Jitter: 70 fs
  • DSA per Channel Extends DNR
  • RF and Digital Power Detectors
• RF Frequency Range: 30 MHz to 5 GHz
• Fast Frequency Hopping < 1 µs
• Receive Digital Signal Path:
  • Bypassable Quad DDC per ADC
  • 3 Phase Coherent 32-bit NCOs per DDC
  • Decimation Ratio: 3x to 32x
• Transmit Digital Signal Path:
  • Quad DUC per DAC with 32-bit NCOs
  • Interpolation Ratio: 6x to 36x
  • sin(x)/x Correction and Configurable Delay
  • Power Amp Protection
• JESD204B Interface:
  • 8 Transceivers at up to 15 Gbps
  • Subclass 1 Multichip Synchronization
• Clocks:
  • Internal PLL/VCO With Bypass Option
  • Clock Output up to 3 GHz With Clock Divider
• DAC Power Dissipation: 1.8 W/ch at 9 GSPS
• ADC Power Dissipation: 1.9 W/ch at 3 GSPS
• Package: 17-mm x 17-mm FC BGA, 0.8-mm Pitch

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