ADS42JB69 - Dual-Channel, 16-Bit, 250-MSPS Analog-to-Digital Converter (ADC)

The ADS42JB69 and ADS42JB49 are high-linearity, dual-channel, 16- and 14-bit, 250-MSPS, analog-to-digital converters (ADCs). These devices support the JESD204B serial interface with data rates up to
3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy making it easy to drive analog inputs up to very high input frequencies. A sampling clock divider allows more flexibility for system clock architecture design. The devices employ internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.

• Dual-Channel ADCs
• 14- and 16-Bit Resolution
• Maximum Clock Rate: 250 MSPS
• JESD204B Serial Interface
  • Subclass 0, 1, 2 Compliant
  • Up to 3.125 Gbps
  • Two and Four Lanes Support
• Analog Input Buffer with High-Impedance Input
• Flexible Input Clock Buffer:
  Divide-by-1, -2, and -4
• Differential Full-Scale Input: 2 V_PP and 2.5 V_PP
  (Register Programmable)
• Package: 9-mm × 9-mm VQFN-64
• Power Dissipation: 850 mW/Ch
• Aperture Jitter: 85 f_S rms
• Internal Dither
• Channel Isolation: 100 dB
• Performance:
  • f_IN = 170 MHz at 2 V_PP, –1 dBFS
    • SNR: 73.3 dBFS
    • SFDR: 93 dBc for HD2, HD3
    • SFDR: 100 dBc for Non HD2, HD3
  • f_IN = 170 MHz at 2.5 V_PP, –1 dBFS
    • SNR: 74.7 dBFS
    • SFDR: 89 dBc for HD2, HD3 and
      95 dBc for Non HD2, HD3