The TLC3541 and TLC3545 are a family of high performance, 14-bit, low power, miniature CMOS analog-to-digital converters (ADCs). These devices operate from a single 5-V supply. Devices are available with single, dual, or single pseudo-differential inputs. All of these devices have a chip select (CS)\, serial clock (SCLK), and serial data output (SDO) that provides a direct 3-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a DSP, a frame sync signal (FS) is used to indicate the start of a serial data frame on either pin 1 (CS)\ or pin 7 (FS) for the TLC3541. The TLC3545 ADC connects to the DSP via pin 1 only (CS)\.
The TLC3541 and TLC3545 are designed to operate with low power consumption. The power saving feature is further enhanced with an auto-power down mode. This product family features a high-speed serial link to modern host processors with an external SCLK up to 15 MHz. Both families use a built-in oscillator as the conversion clock, providing a 2.67 us maximum conversion time.
Products containing the "TLC3541" keyword are: TLC3541 , TLC3541EVM , TLC3541EVM , TLC3541ID , TLC3541ID , TLC3541IDG4 , TLC3541IDG4 , TLC3541IDGK , TLC3541IDGK , TLC3541IDGKG4 , TLC3541IDGKG4 , TLC3541IDGKR , TLC3541IDGKRG4 , TLC3541IDR , TLC3541IDR , TLC3541IDRG4 , TLC3541IDRG4| Status | ACTIVE |
| SubFamily | Precision ADCs (<=10MSPS) |
| Resolution | 14 |
| Sample Rate | 0.2 |
| Number of input channels | 1 |
| INL | 1 |
| SNR | 82 |
| SFDR | 95 |
| Power consumption | 17 |
| Interface | SPI |
| Architecture | SAR |
| Operating temperature range | -40 to 85 |
| Rating | Catalog |
| Package Group | SOIC|8 |
| Package size: mm2:W x L (PKG) | [pf]8SOIC[/pf]: 29 mm2: 6 x 4.9 (SOIC|8) |
| Approx. price | 5.48 | 1ku |
| Analog input BW |