SN74ALVCH16835 - 18-Bit Universal Bus Driver With 3-State Outputs

Updated : 2018-12-18 17:13:06
Description

This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation.

Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Products containing the "SN74ALVCH16835" keyword are: SN74ALVCH16835DGGR , SN74ALVCH16835DGVR , SN74ALVCH16835DL , SN74ALVCH16835DLR , SN74ALVCH16835KR
Features

  • Member of the Texas Instruments Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 3.6 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.