The SN74LV4040A device is a 12 bit asynchronous binary counter with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
Status | ACTIVE |
SubFamily | Counter/arithmetic/parity function |
Technology Family | LV-A |
VCC | 5.5 |
Bits | 12 |
Voltage | 2.5^3.3^5 |
F @ nom voltage | 70 |
ICC @ nom voltage | 0.02 |
tpd @ Nom Voltage | 12 |
Rating | HiRel Enhanced Product |
Operating temperature range | -55 to 125 |
Package Group | TSSOP|16 |
Package size: mm2:W x L (PKG) | [pf]16TSSOP[/pf]: 22 mm2: 4.4 x 5 (TSSOP|16) |
Approx. price | 0.80 | 1ku |