The SN74LV393A contains eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. This device is designed for 2-V to 5.5-V VCC operation.
This device comprises two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK)\ input. The device changes state on the negative-going transition of the CLK\ pulse. N-bit binary counters can be implemented with each package, providing the capability of divide by 256. The SN74LV393A has parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system timing signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
Status | ACTIVE |
SubFamily | Counter/arithmetic/parity function |
Technology Family | LV-A |
VCC | 5.5 |
Bits | 4 |
Voltage | 2.5^3.3^5 |
F @ nom voltage | 70 |
ICC @ nom voltage | 0.02 |
tpd @ Nom Voltage | 16.5 |
Rating | HiRel Enhanced Product |
Operating temperature range | -40 to 105 |
Package Group | TSSOP|14 |
Package size: mm2:W x L (PKG) | [pf]14TSSOP[/pf]: 32 mm2: 6.4 x 5 (TSSOP|14) |
Approx. price | 0.75 | 1ku |