Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.
Status | ACTIVE |
SubFamily | Counter/arithmetic/parity function |
Technology Family | LS |
VCC | 5.25 |
Bits | 4 |
Voltage | 5 |
F @ nom voltage | 35 |
ICC @ nom voltage | 26 |
tpd @ Nom Voltage | 60 |
Rating | Space |
Operating temperature range | -55 to 125 |
Package Group | CFP|14 |
Package size: mm2:W x L (PKG) | See datasheet (CFP) |
Approx. price |