This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or pulldown resistors.
The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.
Products containing the "SN74ACT1073" keyword are: SN74ACT1073DW , SN74ACT1073DW , SN74ACT1073DWG4 , SN74ACT1073DWG4 , SN74ACT1073DWR , SN74ACT1073DWR , SN74ACT1073NS , SN74ACT1073NSR , SN74ACT1073NSR , SN74ACT1073NSRG4| Status | ACTIVE |
| SubFamily | Bus termination array/network |
| Technology Family | ACT |
| VCC | 5.5 |
| Bits | 16 |
| Voltage | 5 |
| F @ nom voltage | 90 |
| ICC @ nom voltage | 0.04 |
| tpd @ Nom Voltage | |
| Rating | Catalog |
| Operating temperature range | -40 to 85 |
| Package Group | SOIC|20 |
| Package size: mm2:W x L (PKG) | [pf]20SO[/pf]: 98 mm2: 7.8 x 12.6 (SO|20) |
| Approx. price | 1.35 | 1ku |