These octal flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The eight flip-flops of the LVTH374 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE\ does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
Products containing the "SN74LVTH374" keyword are: SN74LVTH374DB , SN74LVTH374DBR , SN74LVTH374DBR , SN74LVTH374DBR LXH374 , SN74LVTH374DBRG4 , SN74LVTH374DW , SN74LVTH374DW , SN74LVTH374DWE4 , SN74LVTH374DWE4 , SN74LVTH374DWG4 , SN74LVTH374DWG4 , SN74LVTH374DWR , SN74LVTH374DWR , SN74LVTH374DWRE4 , SN74LVTH374IPWREP , SN74LVTH374IPWREP , SN74LVTH374NS , SN74LVTH374NSR , SN74LVTH374NSR , SN74LVTH374NSRG4Status | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | LVT |
VCC | 3.6 |
Bits | 8 |
Voltage | 3.3 |
F @ nom voltage | 160 |
ICC @ nom voltage | 5 |
tpd @ Nom Voltage | 4.5 |
3-state output | Yes |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SOIC|20 |
Package size: mm2:W x L (PKG) | [pf]20SO[/pf]: 98 mm2: 7.8 x 12.6 (SO|20) |
Approx. price | 0.26 | 1ku |