SN74LVTH32374 - 3.3-V ABT 32-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

The SN74LVTH32374 is a 32-bit edge-triggered D-type flip-flop designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

This device can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop. On the positive transition of the clock (CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

When V_CC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

Products containing the "SN74LVTH32374" keyword are: SN74LVTH32374GKER , SN74LVTH32374ZKER , SN74LVTH32374ZKER

• Member of the Texas Instruments Widebus+™ Family
• State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
• Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
• I_off and Power-Up 3-State Support Hot Insertion
• Supports Mixed-Mode Signal Operation on All Ports (5-V Input and Output Voltages With 3.3-V V_CC)
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Supports Unregulated Battery Operation Down to 2.7 V

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