This 16-bit edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVC16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVC16374 is characterized for operation from -40°C to 85°C.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Status | ACTIVE |
SubFamily | D-type flip-flop |
Technology Family | LVC |
VCC | 3.6 |
Bits | 16 |
Voltage | 2.7^3.3 |
F @ nom voltage | 100 |
ICC @ nom voltage | 0.04 |
tpd @ Nom Voltage | 8.5^7.5 |
3-state output | Yes |
Rating | Catalog |
Operating temperature range | -40 to 85 |
Package Group | SSOP|48 |
Package size: mm2:W x L (PKG) | [pf]48SSOP[/pf]: 164 mm2: 10.35 x 15.88 (SSOP|48) |
Approx. price | 0.45 | 1ku |