SN74LV595A-Q1 - Automotive Catalog 8-Bit Shift Registers With 3-State Output Registers

The SN74LV595A is an 8-bit shift register designed for 2-V to 5.5-V V_CC operation.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs except Q_H' are in the high-impedance state.

Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Qualified for Automotive Applications
• Customer-Specific Configuration Control Can Be Supported
  Along With Major-Change Approval
• 2-V to 5.5-V V_CC Operation
• Typical V_OLP (Output Ground Bounce)
  < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
  > 2.3 V at V_CC = 3.3 V, T_A = 25°C
• Supports Mixed-Mode Voltage Operation on All Ports
• 8-Bit Serial-In, Parallel-Out Shift
• I_off Supports Partial-Power-Down Mode Operation
• Shift Register Has Direct Clear